1. Field of the Invention
The present invention relates generally to microelectronics fabrication of semiconductor devices, and more particularly to a method of fabricating highly integrated thin-film transistor structures and associative leads as implemented on a single substrate. The invention also relates to the active-matrix liquid crystal display architecture.
2. Description of the Prior Art
In the fabrication of semiconductor devices such as integrated circuits (ICs) with complementary metal oxide semiconductor field effect transistors (CMOSFETs), successful formation of thin-film transistors (TFTs) on an insulating substrate has been an important goal not only to provide maximized packing density or integration but also to improve certain device performance characteristics, such as operating speed and frequency response. This has been developed until today under the name of the "semiconductor on insulator (SOI)" technology. The SOI technology has become important also for use in reduced-thickness display devices, including currently available active-matrix liquid crystal display (LCD) panels which are becoming important more and more in the manufacture of electronic equipment such as portable or handheld personal computers (PCs), television systems, image processing apparatus, motor vehicle navigation systems, and others.
Highly integrated active-matrix LCD panels come with an increased number of rows and columns of picture elements or "pixels" on an insulative or dielectric substrate, which may be made of glass, quartz, ceramics or the like. A respective one of these pixels includes a TFT which controls transfer of a packet of signal charge to and from an associated pixel electrode as provided therein.
One prior known fabrication of a matrix of LCD pixel TFTs on a single base plate is shown in FIGS. 6A to 6E. See FIG. 6A. As shown, the LCD base plate may be a glass or quartz substrate 11 having a top surface on which a primary coat film 12 is formed by plasma chemical vapor deposition (CVD) or sputtering techniques. An amorphous silicon film (not shown) is formed on coat 12 using plasma CVD or low pressure CVD, and is then crystallized by thermal treatment or laser irradiation to provide a crystalline silicon film (not shown). This silicon film is next patterned forming on substrate 11 a patterned silicon island 13 which will act as the active layer of an intended TFT under manufacture. A silicon oxide film 14 is formed by plasma CVD on the entire top surface of resultant structure, as the gate insulation film of the TFT.
Then, as shown in FIG. 6B, a patterned aluminum island 15 is formed to insulatively overlie the active layer 13. Aluminum island 15 acts as the TFT gate electrode. Gate electrode 15 is elongated from a matrix of associative gate lines on substrate 11. As the LCD increases in screen size, the gate lines increase in length as well to span an extended distance which measures more than several centimeters. An increase in gate-line length results in an increase in electrical resistivity. To attain lower resistivity, it is inevitable to employ low-resistance metallic materials for such gate lines. Typically, low-resistance metals include aluminum, which has been widely used in the manufacture of semiconductor devices due to its commercial availability at low costs.
After formation of the gate electrode 15, resultant structure is put in chosen electrolytic solution and is then subject to anodizing process or "anodization," forming and anode oxide thin film 16 on the exposed top and side surfaces of gate electrode 15 as shown in FIG. 6C. The anodization is carried out with gate 15 being as the anode while a platinum electrode is as the cathode therefor. Anode oxide film 16 may function as a protective layer which physically wraps and electrically isolates aluminum gate 15 from the remaining parts or elements on substrate 11.
As readily recognized by one of ordinary skill in the art to which the invention pertains, accomplishment of low resistivity by use of aluminum does not come without accompanying a conflicting problem: a reduction in thermal or heat resistivity. This problem becomes more serious especially when aluminum is heated during several steps of fabrication, including heat application during annealing and deposition of films as required. This can be said because such lowered heat resistivity can result in creation of hillocks and whiskers, which may refer to undesired crystal projections that resemble in shape spines or needles and badly behave to cause electrical short-circuiting between adjacent lead wires as well as between electrodes. In this respect, forming the anode oxide film 16 is a key to suppressing or eliminating occurrence of such of hillocks and whiskers.
After formation of the anode oxide film 16, a silicon oxide film 17 is deposited by plasma CVD on the surface of resultant structure, as an interlayer dielectric film. Film 17 is patterned forming therein contact holes for making electrical contacts with required parts or elements, involving a contact hole 18 for electrical interconnection with gate electrode 15 as shown in FIGS. 6D and 6E. Forming gate contact hole 18 includes selectively etching away the individual one of interlayer dielectric film 17 and anode oxide film 16, and causing gate 15 (or, a gate lead wire as extended therefrom) to locally expose on its top surface. Here, selective etching removal of anode oxide film 16 raises difficulty in process. Since such film 16 is typically hard in physical nature, accurate selective removal of the same by etching remains difficult, although this hardness, on the other hand, may advantageously serve to enhance the protectability for aluminum electrodes and chip lead wires concerned.
By way of example, consider that the contact hole 18 is formed in the interlayer silicon oxide film 17 using hydrofluoric acid-based etchant such as buffered hydrofluoric acid solution. Imagine that the underlying anode oxide film 16 is successively etched away for formation of an extended portion(s) of contact hole 18 reaching the top surface of gate electrode 15. This approach is encountered with problems which follow. First, anode oxide film 16 is hardly etched away at a selected portion during the etching process; once the contact hole 16 is completed, gate electrode 15 can be overetched to deform significantly as a whole. This can take place due to the fact that aluminum constituting gate electrode 15 is greater in etching speed than aluminum oxides, such as anode oxide 16. Second, while anode oxide 16 remains nonetched, interlayer dielectric film 17 can be laterally overetched at the side walls of contact hole 18. Such excess side-etching results in a decrease in accuracy of device fabrication.
One possible approach to avoid the problems is making use of special kind of etchant capable of selectively etching away aluminum oxides only, such as the anode oxide film 16. Chromium-mixed acid is one example. This acid is solution containing therein a mixture of phosphoric acid, acetic acid and nitric acid as added with chromium acid. Unfortunately, this approach is encountered with another serious problem: A passivated film (film of passive state) can be formed on the surface of aluminum islands. To successfully remove such passivation film (film of passive state) from aluminum, it should be required that a further etching process be carried out by use of hydrofluoric acid-based etchant, increasing complexity and costs for manufacture. Another disadvantage of the approach is that it is very difficult to retain expected etching effect. This is due to increased variations in composition of materials resulting from execution of etching treatments using chromium acid. From the foregoing, it can be seen that prior known approaches to form contact holes in anode oxide films are faced with several serious problems and difficulties.
On the other hand, in order to successfully perform anodization process, it has been strictly required that all of the subject electrodes and/or lead wires be electrically coupled to one another at any events during fabrication. Another strict requirement is that after completion of such anodization, these lead wires are capable of being cut into parts for electrical interruption at appropriate stage of the fabrication process. This lead-cut or separation also accompanies with similar problems as raised due to the difficulty of removal of anode oxides by selective etching. Furthermore, if the lead-cut process is to be done independently at a step of fabrication then complexity increases accordingly.